I/O System Exercises

Approach: List the five functions in the order in which the I/O system uses them — moving the data, controlling the devices, converting the information, managing the device resources, and handling the errors — and attach the concrete work of each.

Steps:

1. Data exchange:
   • Transfers data between the CPU and the I/O devices
   • Supports different data formats
   • Guarantees the reliability of data transfer
2. Device control:
   • Controls the working state of the I/O devices
   • Manages the start and the stop of a device
   • Handles device exceptions
3. Information conversion:
   • Converts the data formats
   • Adapts to different device interfaces
   • Handles signal level conversion
4. Device management:
   • Manages the device resources
   • Handles device conflicts
   • Provides the device drivers
5. Error handling:
   • Detects device errors
   • Handles transmission errors
   • Provides an error recovery mechanism

Answer: The basic functions of the I/O system are data exchange between the CPU and the I/O devices, device control that manages the working state, the start and the stop of a device, and its exceptions, information conversion of data formats, device interfaces, and signal levels, device management that allocates the device resources, resolves conflicts, and supplies the drivers, and error handling that detects device and transmission errors and provides a recovery mechanism.

Approach: Split the answer into the three categories the question asks for, and for each category give five concrete devices together with the capability that makes them worth naming.

Steps:

1. Input devices:
   1. Keyboard: a character input device that supports many input methods
   2. Mouse: a graphical interface input device that supports clicking and dragging
   3. Scanner: an image input device that supports OCR text recognition
   4. Camera: a video input device that supports real-time video transmission
   5. Microphone: an audio input device that supports speech recognition
2. Output devices:
   1. Monitor: an image output device that supports different resolutions
   2. Printer: a text and image output device that supports colour printing
   3. Speakers: an audio output device that supports stereo
   4. Projector: a large-screen display device that supports high resolution
   5. Plotter: a graphics output device used for engineering drawings
3. External storage:
   1. Hard disk: a large-capacity storage device that supports fast reading and writing
   2. Optical disc: a portable storage device that supports read-only and writable media
   3. USB flash drive: a portable storage device that supports hot plugging
   4. Memory card: a small storage device used in digital devices
   5. Magnetic tape: a large-capacity backup device with a low cost

Answer: Input devices include the keyboard, the mouse, the scanner, the camera, and the microphone. Output devices include the monitor, the printer, the speakers, the projector, and the plotter. External storage includes the hard disk, the optical disc, the USB flash drive, the memory card, and the magnetic tape.

Approach: Treat the interface as the boundary between the host and the device, and give the six functions that boundary has to perform: converting the signals, buffering the data, controlling the device, converting the protocol, handling the errors, and managing the resources.

Steps:

1. Signal conversion:
   • Converts the signal levels
   • Adapts to different device interfaces
   • Handles the signal timing
2. Data buffering:
   • Buffers the data being transferred
   • Balances the difference in speed
   • Raises the transfer efficiency
3. Device control:
   • Controls the working state of the device
   • Manages the device registers
   • Handles device interrupts
4. Protocol conversion:
   • Converts the data transfer protocols
   • Adapts to different device standards
   • Guarantees the compatibility
5. Error handling:
   • Detects transmission errors
   • Provides an error recovery mechanism
   • Guarantees the reliability of data transfer
6. Resource management:
   • Manages the resources of the interface
   • Handles device conflicts
   • Optimises the use of the resources

Answer: The main functions of an I/O interface are signal conversion, which converts the signal levels, adapts to the device interfaces, and handles the signal timing; data buffering, which buffers the transferred data, balances the difference in speed, and raises the transfer efficiency; device control, which controls the working state, manages the device registers, and handles the interrupts; protocol conversion, which converts the transfer protocols and adapts to the device standards so that they remain compatible; error handling, which detects transmission errors and provides a recovery mechanism; and resource management, which manages the interface resources, handles device conflicts, and optimises their use.

Approach: Compare the three modes on the same five axes — the working principle, the CPU utilisation, the implementation complexity, the application scenario, and the efficiency — and then summarise the ordering.

Steps:

1. Programmed I/O:
   • Working principle: the CPU actively polls the state of the device
   • CPU utilisation: low, because the CPU spends most of its time waiting
   • Implementation complexity: simple and easy to implement
   • Application scenario: simple systems, low-speed devices
   • Efficiency: the lowest, because the CPU is badly wasted
2. Interrupt-driven I/O:
   • Working principle: the device interrupts the CPU when it becomes ready
   • CPU utilisation: high, because the CPU can execute other tasks
   • Implementation complexity: moderate, since interrupt handling is needed
   • Application scenario: most I/O devices
   • Efficiency: comparatively high, with good CPU utilisation
3. The DMA mode:
   • Working principle: the data is transferred directly between memory and the peripheral
   • CPU utilisation: the highest, because the CPU only initiates and terminates the transfer
   • Implementation complexity: complex, since a DMA controller is needed
   • Application scenario: high-speed devices, bulk data transfers
   • Efficiency: the highest, with the lightest load on the CPU
4. Performance comparison:
   • DMA > interrupt > programmed I/O
   • Complexity: DMA > interrupt > programmed I/O
   • Cost: DMA > interrupt > programmed I/O

Answer: Programmed I/O has the CPU poll the device, so it is the simplest and the cheapest but wastes the CPU the most; interrupt-driven I/O lets the device raise an interrupt when it is ready, so the CPU can do other work and both the utilisation and the efficiency are much better; DMA moves the data directly between memory and the peripheral, so the CPU is barely involved and the efficiency is the highest, at the price of the most complex and expensive hardware. In short: DMA > interrupt > programmed I/O for efficiency, complexity, and cost alike.

Approach: Describe each addressing scheme along the same six axes — characteristic, address space, instructions, advantages, disadvantages, and applications — and then compare them directly.

Steps:

1. Unified addressing:
   • Characteristic: memory and I/O share one address space
   • Address space: they share the same address space
   • Instructions: the same access instructions are used
   • Advantages: simple instructions, convenient programming
   • Disadvantages: the address space is divided, so the memory space shrinks
   • Applications: most modern computers
2. Independent addressing:
   • Characteristic: memory and I/O are addressed separately
   • Address space: they have their own independent address spaces
   • Instructions: dedicated I/O instructions are used
   • Advantages: the address space is independent, so the memory space stays complete
   • Disadvantages: the instructions are complex and dedicated I/O instructions are needed
   • Applications: early computers and some embedded systems
3. The comparison:
   • Address space: independent addressing protects the memory space
   • Instruction complexity: unified addressing has simpler instructions
   • Programming convenience: unified addressing is more convenient to program
   • Hardware complexity: independent addressing has more complex hardware

Answer: The two ways of addressing I/O ports are unified addressing, in which memory and I/O share one address space and the same access instructions, which makes the instructions simple and the programming convenient but divides the address space and shrinks the memory space, and independent addressing, in which memory and I/O have separate address spaces and dedicated I/O instructions, which keeps the memory space complete but makes the instructions and the hardware more complex. Most modern computers use unified addressing, while early computers and some embedded systems use independent addressing.

Approach: Take the three modes in turn and describe their effect on CPU utilisation, response time, and throughput, then add the optimisation advice and close with the system-level consequences.

Steps:

1. Programmed I/O:
   • CPU utilisation: extremely low, because the CPU spends most of its time waiting
   • Response time: long, because the CPU has to poll and wait
   • Throughput: low, because the CPU cannot be fully used
   • Application scenario: simple systems, low-speed devices
2. Interrupt-driven I/O:
   • CPU utilisation: high, because the CPU can execute other tasks
   • Response time: moderate, the interrupt response time
   • Throughput: comparatively high, with good CPU utilisation
   • Application scenario: most I/O devices
3. The DMA mode:
   • CPU utilisation: the highest, with the lightest load on the CPU
   • Response time: short, because the transfer is direct
   • Throughput: the highest, suitable for bulk data transfers
   • Application scenario: high-speed devices, bulk data transfers
4. Optimisation advice:
   • Choose the right I/O mode: pick it according to the characteristics of the device
   • Optimise the interrupt handling: reduce the interrupt overhead
   • Use DMA: for bulk data transfers
   • Balance the considerations: weigh the cost, the complexity, and the performance
5. The system-level impact:
   • Overall performance: the I/O mode affects the overall performance of the system
   • User experience: it affects the response speed of the system
   • Resource utilisation: it affects the utilisation of the CPU and of the I/O devices

Answer: The three I/O modes differ sharply in what they cost the CPU. Programmed I/O burns the CPU on polling, so the utilisation is extremely low, the response time is long, and the throughput is poor. Interrupt-driven I/O frees the CPU to do other work, so the utilisation and the throughput are much better and the response time is only the interrupt response time. DMA barely involves the CPU, so it gives the highest utilisation and throughput and the shortest response time. Choosing the mode that fits the device, optimising the interrupt handling, using DMA for bulk transfers, and balancing cost against complexity and performance is what makes the difference at the system level.

Approach: Fix the transfer size, turn the data rate into an interrupt frequency, multiply that frequency by the per-interrupt overhead to get the CPU time per second, and divide by one second to obtain the utilisation.

Steps:

1. Data transfer rate: 1MB/s = 1,048,576 bytes/second
2. Interrupt frequency:
   • Assume 1KB of data is transferred per interrupt
   • Interrupt frequency = 1,048,576 ÷ 1,024 = 1,024 interrupts/second
3. CPU time consumed:
   • Interrupt handling time per interrupt: 10μs = 10 × 10^-6 seconds
   • CPU time consumed per second: 1,024 × 10 × 10^-6 = 0.01024 seconds
4. CPU utilisation:
   • CPU utilisation = 0.01024 ÷ 1 = 1.024%
   • That is, the CPU spends only 1.024% of its time on the I/O handling
5. Analysis:
   • The CPU utilisation is very low
   • Most of the time is available for other tasks
   • The interrupt mode is fairly efficient

Answer: The data transfer rate is 1MB/s = 1,048,576 bytes/second, and assuming 1KB per transfer the interrupt frequency = 1,048,576 ÷ 1,024 = 1,024 interrupts/second. With an interrupt handling time of 10μs = 10 × 10^-6 seconds, the CPU time consumed per second is 1,024 × 10 × 10^-6 = 0.01024 seconds, so the CPU utilisation = 0.01024 ÷ 1 = 1.024%. The CPU therefore spends only 1.024% of its time on the I/O handling, which is why the interrupt mode is efficient and leaves the CPU free for other tasks most of the time.

Approach: Design the system in five layers — the architecture, the mode selection rule, the resource management, the performance tuning, and the error handling — and make the selection rule explicit so that the design really does support several modes.

Steps:

1. The system architecture:
   • I/O controller: manages the different I/O modes
   • Device interface: a uniform device interface
   • Interrupt controller: manages the interrupt requests
   • DMA controller: manages the DMA transfers
2. Mode selection:
   • Low-speed devices: use programmed I/O
   • Medium-speed devices: use the interrupt mode
   • High-speed devices: use the DMA mode
   • Dynamic selection: choose according to the volume of the transfer
3. Resource management:
   • Interrupt management: allocate the interrupt numbers and handle the interrupt conflicts
   • DMA management: allocate the DMA channels and manage the transfers
   • Device management: device registration, initialisation, and release
4. Performance optimisation:
   • Buffering mechanism: reduce the number of I/O operations
   • Batch transfer: raise the transfer efficiency
   • Priority management: important devices go first
5. Error handling:
   • Timeout handling: deals with device failures
   • Error recovery: an automatic retry mechanism
   • Status monitoring: monitors the state of the devices

Answer: The design uses an I/O controller to manage the different I/O modes behind a uniform device interface, with an interrupt controller for the interrupt requests and a DMA controller for the direct transfers. The mode is selected by the speed of the device — programmed I/O for low-speed devices, the interrupt mode for medium-speed ones, and DMA for high-speed ones — and dynamically according to the volume of each transfer. On the resource side the interrupt numbers are allocated and their conflicts resolved, the DMA channels are allocated and their transfers managed, and the devices are registered, initialised, and released. Performance comes from buffering, batch transfers, and priority management for the important devices, while the error handling adds timeouts, automatic retries, and status monitoring.