CPU Fundamentals

CPU Fundamentals

1. The Functions and Basic Structure of the CPU

The Basic Functions of the CPU

Control function:

  • Controls the coordinated operation of all the components of the computer
  • Executes the sequence of program instructions
  • Manages the flow of data and the timing

Arithmetic function:

  • Performs arithmetic operations (addition, subtraction, multiplication, division)
  • Performs logical operations (AND, OR, NOT, XOR)
  • Performs shift operations (left shift, right shift)

Coordination function:

  • Coordinates the work of memory and I/O devices
  • Manages interrupts and exceptions
  • Controls bus transfers

The Basic Structure of the CPU

Arithmetic logic unit (ALU):

  • Arithmetic logic unit: performs arithmetic and logical operations
  • Accumulator: stores the result of an operation
  • General-purpose registers: store operands and intermediate results
  • Flag register: stores the status flags of the operation

Control unit:

  • Instruction register: stores the instruction currently being executed
  • Program counter: stores the address of the next instruction
  • Instruction decoder: analyses the meaning of the instruction
  • Timing controller: generates the control signals

Register set:

  • General-purpose registers: R0-R15, store data
  • Special-purpose registers: PC, SP, BP, and so on
  • Status register: stores the status information of the CPU

Internal buses:

  • Data bus: transfers data
  • Address bus: transfers addresses
  • Control bus: transfers control signals

2. The Instruction Execution Process

The Basic Execution Cycle

Fetch stage (IF):

  • Fetches the instruction from memory
  • Updates the program counter
  • Moves the instruction into the instruction register

Decode stage (ID):

  • Analyses the operation code of the instruction
  • Determines the address of the operands
  • Prepares the resources needed for execution

Execute stage (EX):

  • Performs the arithmetic or logical operation
  • Computes the effective address
  • Performs the data transfer

Memory access stage (MEM):

  • Accesses the data memory
  • Reads or writes the data
  • Handles memory access conflicts

Write-back stage (WB):

  • Writes the result of the operation back into the register
  • Updates the status flags
  • Completes the execution of the instruction

An Example of Instruction Execution

The ADD R1, R2, R3 instruction:

  • IF (fetch): fetches the instruction ADD R1, R2, R3 from memory
  • ID (decode): determines that the operands are R2 and R3 and the destination is R1
  • EX (execute): performs the addition R2 + R3
  • MEM (memory access): no memory access is needed
  • WB (write back): writes the result back into R1

The LOAD R1, [R2] instruction:

  • IF (fetch): fetches the instruction LOAD R1, [R2] from memory
  • ID (decode): determines the base register R2
  • EX (execute): computes the effective address (the contents of R2)
  • MEM (memory access): reads the data from memory
  • WB (write back): writes the data back into R1

3. The Data Path

The Concept of the Data Path

Basic definition:

  • The path along which data flows inside the CPU
  • The data transfer channel that connects the functional components
  • Realises the data transfers of instruction execution

Composition of the data path:

  • ALU: performs the operations
  • Register set: stores the data
  • Multiplexers: select the source of the data
  • Shifter: performs the shift operations

The Structure of the Data Path

The ALU part:

  • Arithmetic unit: performs the arithmetic and logical operations
  • Input multiplexer: selects the operands
  • Output register: stores the result of the operation

The register part:

  • Register set: stores general-purpose data
  • Special-purpose registers: PC, SP, and so on
  • Register file: multi-port access

The control part:

  • Control signal generation: generates the control signals according to the instruction
  • Timing control: coordinates the work of the components
  • Status control: manages the state of the CPU

Data Path Operations

Reading data:

  1. Read the operand from the register
  2. Select the data through the multiplexer
  3. Feed it into the ALU for the operation

Writing data:

  1. The result of the ALU operation
  2. Through the write-back path
  3. Into the destination register

Transferring data:

  1. Between registers
  2. Between memory and registers
  3. Between I/O devices and registers

4. The Control Unit

The Functions of the Control Unit

Instruction control:

  • Controls the fetching, decoding, and execution of instructions
  • Manages the order in which instructions execute
  • Handles branch and jump instructions

Timing control:

  • Generates the clock signal
  • Coordinates the timing of the components
  • Manages the instruction cycle

Data control:

  • Controls the flow of data
  • Manages the data transfers
  • Handles data conflicts

Types of Control Unit

Hardwired control unit:

  • Implementation: a combinational logic circuit
  • Characteristics: fast, but inflexible
  • Application: RISC processors

Microprogrammed control unit:

  • Implementation: a sequence of microinstructions
  • Characteristics: highly flexible, but slower
  • Application: CISC processors

Control Signals

Timing signals:

  • Clock signal: synchronises the work of the components
  • Reset signal: initialises the system
  • Enable signal: controls whether a component works

Data signals:

  • Read signal: controls reading data
  • Write signal: controls writing data
  • Select signal: controls the selection of data

Status signals:

  • Flag bits: the status of the result of an operation
  • Interrupt signal: an external interrupt request
  • Exception signal: internal exception handling

5. CPU Performance Metrics

Basic Performance Metrics

Clock frequency:

  • The number of times the CPU oscillates per second
  • Unit: Hz, MHz, GHz
  • Impact: the speed of instruction execution

CPI (clock cycles per instruction):

  • The average number of clock cycles needed per instruction
  • Reflects the efficiency of instruction execution
  • Goal: lower the CPI

MIPS (million instructions per second):

  • The number of instructions executed per second
  • Unit: MIPS
  • Calculation: MIPS = clock frequency / (CPI × 10^6)

Advanced Performance Metrics

IPC (instructions per clock cycle):

  • The number of instructions executed per clock cycle
  • IPC = 1 / CPI
  • Reflects the degree of parallelism

Throughput:

  • The number of tasks processed per unit of time
  • Reflects the overall performance of the system
  • Influenced by several factors

Response time:

  • The time needed to complete a task
  • Includes the CPU time and the waiting time
  • Impacts the user experience

Performance Optimisation

Hardware optimisation:

  • Raise the clock frequency
  • Add more cache
  • Optimise the pipeline

Software optimisation:

  • Optimise the algorithms
  • Reduce the instruction count
  • Raise the cache hit rate

System optimisation:

  • Balance the performance of the components
  • Reduce the bottlenecks
  • Raise the overall efficiency

Exercises

Exercise 1

Briefly describe the basic structure of the CPU and its main functions.

CPU StructureALUControl Unit

Approach: Present the structure as four blocks — the ALU, the control unit, the register set, and the internal buses — each with its constituent parts, and then state the three functions the CPU performs over that structure.

Steps:

  1. Arithmetic logic unit (ALU):
    • Arithmetic logic unit: performs arithmetic and logical operations
    • Accumulator: stores the result of an operation
    • General-purpose registers: store operands and intermediate results
    • Flag register: stores the status flags of the operation
  2. Control unit:
    • Instruction register: stores the instruction currently being executed
    • Program counter: stores the address of the next instruction
    • Instruction decoder: analyses the meaning of the instruction
    • Timing controller: generates the control signals
  3. Register set:
    • General-purpose registers: R0-R15, store data
    • Special-purpose registers: PC, SP, BP, and so on
    • Status register: stores the status information of the CPU
  4. Internal buses:
    • Data bus: transfers data
    • Address bus: transfers addresses
    • Control bus: transfers control signals
  5. The main functions:
    • Control function: controls the coordinated operation of all the components of the computer
    • Arithmetic function: performs arithmetic and logical operations
    • Coordination function: coordinates the work of memory and I/O devices

Answer: The basic structure of the CPU consists of the arithmetic logic unit (with its arithmetic logic unit, accumulator, general-purpose registers, and flag register), the control unit (with the instruction register, program counter, instruction decoder, and timing controller), the register set (general-purpose registers R0-R15, special-purpose registers such as PC, SP, and BP, and the status register), and the internal buses (data, address, and control). Its three main functions are the control function, which drives the coordinated operation of the whole machine, the arithmetic function, which performs the arithmetic and logical operations, and the coordination function, which coordinates memory and I/O devices and manages interrupts.

Exercise 2

Which stages make up the instruction execution process?

Instruction CycleIF ID EX MEM WBFetch Decode Execute

Approach: Walk through the cycle in order, naming the five stages and the concrete work each one performs, and then state the property that ties them together.

Steps:

  1. Fetch stage (IF):
    • Fetches the instruction from memory
    • Updates the program counter
    • Moves the instruction into the instruction register
  2. Decode stage (ID):
    • Analyses the operation code of the instruction
    • Determines the address of the operands
    • Prepares the resources needed for execution
  3. Execute stage (EX):
    • Performs the arithmetic or logical operation
    • Computes the effective address
    • Performs the data transfer
  4. Memory access stage (MEM):
    • Accesses the data memory
    • Reads or writes the data
    • Handles memory access conflicts
  5. Write-back stage (WB):
    • Writes the result of the operation back into the register
    • Updates the status flags
    • Completes the execution of the instruction

Answer: The instruction execution process consists of five stages: fetch (IF), decode (ID), execute (EX), memory access (MEM), and write-back (WB). Together these five stages form the basic instruction cycle, although different types of instruction may skip some of them.


Glossary

TermAbbreviationExplanation
Central Processing UnitCPUThe core arithmetic component of a computer
Arithmetic Logic UnitALUPerforms arithmetic and logical operations
Control UnitCUThe component that controls the execution of instructions
Register-High-speed storage inside the CPU
Program CounterPCHolds the address of the next instruction
Instruction RegisterIRHolds the current instruction
Memory Address RegisterMARHolds the address used to access memory
Memory Data RegisterMDRHolds the data read from or written to memory
Program Status WordPSWHolds the status flags of the program
Instruction cycle-The time taken to execute one instruction
Machine cycle-The time taken to complete one basic operation
Clock cycle-One period of the CPU clock
Fetch cycle-The stage in which the instruction is fetched
Decode cycle-The stage in which the instruction is decoded
Execute cycle-The stage in which the instruction is executed
Interrupt cycle-The stage in which an interrupt is handled
Data path-The path along which data is transferred
Bus-The shared channel that connects the components
Hardwired control unit-A control unit implemented with hardware logic
Microprogrammed control unit-A control unit implemented with a microprogram
Control storeCSThe ROM that holds the microprogram
Microinstruction-The basic unit of a microprogram
Microaddress-The address of a microinstruction in the control store

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