Bus Fundamentals

Bus Fundamentals

1. The Basic Concept of a Bus

Bus Definition

Bus:

• A transmission path shared by several components
• Carries data, addresses, and control information
• An essential part of a computer system

Characteristics of a bus:

• Sharing: several components share the same bus
• Time sharing: only one component may use the bus at a given moment
• Standardisation: follows unified standards and protocols

Bus Functions

Data transfer:

• Transfers data among the CPU, memory, and I/O devices
• Supports different data widths
• Guarantees the reliability of data transfer

Address transfer:

• Carries memory addresses and I/O addresses
• Determines the target location of a data transfer
• Supports address expansion

Control signal transfer:

• Carries read/write control signals
• Carries timing control signals
• Carries interrupt and DMA signals

2. Classification of Buses

By Function

Data bus:

• Transfers data information
• Transfers in both directions
• Its width determines the data transfer efficiency

Address bus:

• Transfers address information
• Transfers in one direction (CPU → peripheral)
• Its width determines the addressable range

Control bus:

• Transfers control signals
• Includes read/write, interrupt, DMA and other signals
• Coordinates the work of the components

By Connection Scope

System bus:

• Connects the CPU, memory, and I/O controllers
• A high-speed bus
• For example: the front-side bus (FSB)

I/O bus:

• Connects I/O devices and I/O controllers
• A medium-speed bus
• For example: PCI, PCIe

Communication bus:

• Connects communication devices
• A low-speed bus
• For example: USB, serial ports

Memory bus:

• Connects the CPU and memory
• A dedicated high-speed bus
• For example: the memory bus

3. The Composition of a Bus and Its Performance Metrics

Bus Composition

Transmission lines:

• Data lines: transfer data information
• Address lines: transfer address information
• Control lines: transfer control signals
• Power lines: supply power
• Ground lines: provide the reference ground

Interface circuits:

• Transceiver: sends signals onto the bus
• Receiver: receives signals from the bus
• Driver: strengthens the signal
• Buffer: isolates and buffers the signal

Arbitration logic:

• Bus arbiter: decides who owns the bus
• Priority logic: determines the priority of the devices
• Collision detection: detects bus conflicts

Performance Metrics

Bandwidth (data transfer rate):

• The amount of data transferred per unit of time
• Unit: MB/s, GB/s
• Impact: the overall performance of the system

Bus width:

• The number of bits on the data bus
• 8 bits, 16 bits, 32 bits, 64 bits, and so on
• Impact: the amount of data moved in a single transfer

Bus frequency:

• The operating frequency of the bus
• Unit: MHz, GHz
• Impact: the speed of data transfer

Loading capability:

• The number of devices the bus can connect
• Limited by its drive capability
• Impact: the expandability of the system

4. Bus Operations and Timing

Synchronous Timing

Basic concept:

• There is a unified clock signal
• All operations proceed synchronously on clock edges
• The timing relationships are simple and explicit

Characteristics:

• Advantages: simple timing, simple control
• Disadvantages: constrained by the clock frequency
• Applications: high-speed buses

Timing control:

• Rising clock edge: the data is valid
• Falling clock edge: the data is stable
• Requirements on setup time and hold time

Asynchronous Timing

Basic concept:

• There is no unified clock signal
• Operations are coordinated by handshake signals
• Devices communicate with each other directly

Characteristics:

• Advantages: adapts to devices of different speeds
• Disadvantages: complex control, slower operation
• Applications: connecting low-speed devices

Handshake protocol:

• Request signal: the requester issues the request
• Acknowledge signal: the responder issues the acknowledgement
• Completion signal: confirmation that the operation has finished

5. Common Bus Standards

System Buses

Front-side bus (FSB):

• Connects the CPU and the northbridge chip
• A high-speed synchronous bus
• Its frequency can reach several GHz

Memory bus:

• Connects the CPU and memory
• A dedicated high-speed bus
• Supports dual-channel and quad-channel configurations

I/O Buses

PCI bus:

• A parallel bus standard
• 32-bit / 64-bit data width
• Frequency 33MHz / 66MHz

PCIe bus:

• A serial bus standard
• Point-to-point connection
• High speed, low latency

USB bus:

• A universal serial bus
• Supports hot plugging
• Compatible across multiple versions

Communication Buses

Serial bus:

• RS-232, RS-485
• Point-to-point communication
• Long-distance transmission

Parallel bus:

• IEEE-488
• Multi-device connection
• High-speed data transfer

6. Bus Arbitration

Arbitration Methods

Centralised arbitration:

• A dedicated arbiter
• A unified priority rule
• Simple control

Distributed arbitration:

• Each device arbitrates on its own
• Based on priority or time slices
• Complex control

Priority Strategies

Fixed priority:

• The priority of the devices is fixed
• Simple but possibly unfair
• Suitable for real-time systems

Round-robin priority:

• Priority is handed out in turn
• Fair but less efficient
• Suitable for time-sharing systems

Dynamic priority:

• Priority is adjusted according to the waiting time
• Balances efficiency and fairness
• Suitable for multitasking systems

Exercises

Exercise 1

Briefly describe the basic concept of a bus and its main functions.

Exercise 2

What are the differences between the data bus, the address bus, and the control bus?

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Glossary